Latest news with #RISC
The Hill
6 days ago
- Business
- The Hill
Congress wants to cut the smartest investment taxpayers ever made
Virtually every smartphone on the planet runs on a chip paid for by American taxpayers — a chip that I helped invent. Now Congress is moving to cut funding for the National Science Foundation that could lead to future breakthroughs. Investing in innovation is not wasteful spending. It is one of the smartest investments Washington makes, creating new jobs, stronger businesses and higher tax revenue in every corner of the country. Cutting the level of government funding for scientific research now would rip those future returns out of American hands and deliver them to our global competitors. I built my career in public universities. Over four decades, I helped lead a dozen federally funded research labs. Five of them produced breakthrough technologies that became part of the backbone of modern life. In the 1980s, we developed a much more efficient style of microprocessor (the RISC chip) in a university lab with graduate students funded by the government. At the time, few imagined that breakthrough would one day power 300 billion chips. The National Science Foundation also funded research that made digital storage much more reliable and affordable (called RAID storage), enhancing everything from cloud computing to online banking. These innovations helped launch entire industries and are used daily by billions of people. These breakthroughs did not come from corporate boardrooms or billionaire-backed startups. They were built by students, developed in public labs and funded by American taxpayers. For decades, my research received support from the NSF's Directorate for Computer and Information Science and Engineering, through grants and Ph.D. fellowships. All told, American taxpayers invested just under $100 million in the labs I helped lead. Accounting for inflation, technologies that came out of them went on to generate over $1 trillion in product sales. That is a 10,000-to-1 return on investment to the public and surely at least 1,000-to-1 return directly back to the government in taxes. Not from luck, but from decades of public investment. And the payoff is real. These gains show up as jobs in 44 states, tools that power small businesses and tax revenue that supports public schools, infrastructure and national defense. These returns belong to the American taxpayer. This isn't some ivory tower experiment or elite subsidy. It is an innovation engine and one of the most powerful drivers of U.S. economic strength. So what is Congress doing with one of the few federal programs that consistently creates value for everyday Americans? Preparing to cut National Science Foundation funding by $2 billion, a 23 percent reduction from 2025. The Trump administration has signaled that it wants to prioritize artificial intelligence, with efforts such as the recent AI Action Plan and the announcement of $100 million in NSF investment. These efforts can't begin to offset the damage of deep cuts to the broader ecosystem that makes future AI breakthroughs possible. Cutting the budget of the Directorate for Computer and Information Science and Engineering would be a self-inflicted blow to American competitiveness. Lawmakers say they're prioritizing programs with the greatest national impact, but this cut targets the very office funding the administration's top priorities: AI, quantum computing and cybersecurity. That's not prioritization. It's a fiduciary failure. AI is advancing fast, but it depends on breakthroughs throughout the computing stack. My own specialty, computer design, may seem distant from AI, but it's fundamental. Just look at NVIDIA's stock price. None of this appeared out of thin air. It came from researchers trained through NSF fellowships. Shrink the pipeline, and we lose the lead. Anticipating cuts, NSF has already halved its fellowships for 2025. We need more computer scientists, not fewer, and we need them trained here, not in countries eager to claim our place. China has more than tripled its research spending since 2010 and continues to raise it every year. China understands what is at stake: leadership in AI, semiconductors, cybersecurity and advanced computing. If we back off now, foreign firms will not hesitate to build on the breakthroughs that American taxpayers made possible. They will turn our investment in research into their dominance, and the jobs and industries that should grow in Atlanta, Boston and Dallas will take root in London, Bangalore and Shenzhen. As a scientist, I'm scared. As a taxpayer, I'm livid. We built a lead. Now Washington is ready to give it away. Since its founding, America has capitalized on innovation as the primary engine of wealth creation and nationwide prosperity. History is full of nations that failed to innovate and lost their edge. The U.S. has done the opposite. We invested in research, trained generations of scientists and engineers and built the most dynamic innovation ecosystem the world has ever seen. Every American taxpayer is a silent shareholder in that success. If we walk away now, we lose not just future breakthroughs but also what we have already earned. If Congress fails to preserve this funding, we hand our competitive edge and prosperity to someone else.
Cision Canada
12-06-2025
- Automotive
- Cision Canada
MIPS and Cyient Semiconductor collaborate to bring Custom RISC-V-based intelligent power solutions to AI Power Delivery, Industrial Robotics, and Automotive
SAN JOSE, Calif. and HYDERABAD, India, June 12, 2025 /CNW/ -- Cyient Semiconductors Private Limited, a fast-growing custom silicon company based in Hyderabad, and MIPS, a global leader in RISC-V processor IP, today announced a strategic collaboration to develop domain-optimized ASIC (application-specific integrated circuit) and ASSP (application-specific standard product) solutions that leverage the MIPS Atlas portfolio of advanced, efficient processor IP. The partnership will focus on enabling real-time, safety-critical applications, power delivery, and compute efficiency in demanding platforms for automotive, industrial, and data center markets. Motor Control & Data Center Power Delivery are focal platforms to leverage Cyient's Analog Mixed Signal capabilities and MIPS Atlas CPU IP. "As compute systems scale from cloud to the edge, intelligent power delivery is emerging as a key enabler of performance and efficiency," said Suman Narayan, CEO of Cyient Semiconductors."Our collaboration with MIPS allows us to bring together embedded intelligence and advanced power architectures in custom silicon platforms built on a scalable, open foundation. Together, we are designing tomorrow's semiconductors — purpose-built for a more connected and power-efficient world." "The problem of power efficiency and motor control are both real-time compute workloads for which MIPS M8500 microcontrollers are the optimal choice," said Sameer Wasson, CEO of MIPS. "Building around our best-in-class real-time and control-loop performance and efficiency, Cyient can bring their unique capability in intelligent power delivery into custom ASIC and ASSP designs to build differentiated solutions that meet our customers unique needs in their target markets." Demand for software defined vehicles, data center infrastructure, and industrial automation is driving growth for custom silicon. Customers can build advanced, differentiated solutions that are easy to program using MIPS advanced processor IP, based on the open RISC-V instruction set architecture, combined with Cyient intelligent power and mixed-signal design expertise. Targeted applications include motor drive control, intelligent power management, power delivery management, and safety-critical applications, offered as ASSP or ASIC platforms. OEMs and system integrators will benefit from faster time-to-market, avoiding proprietary lock-ins, and optimized platform cost. About MIPS MIPS is the leading provider of compute subsystems for autonomous platforms in automotive, industrial, and embedded markets. With a 40-year heritage in RISC computing innovation and safety capable processing, MIPS is uniquely positioned to simplify the adoption of Physical AI in industrial robotics and automotive applications. MIPS pioneering patented technology is based on the open specification RISC-V instruction set architecture, enabling customers to move beyond proprietary legacy architecture lock-ins. For more information, please visit Cyient Semiconductors, a Cyient Group company, delivers high-performance, power-efficient silicon solutions across analog, mixed-signal, RF, and digital domains. Serving HPC, data centres, industrial automation, communications, automotive, and healthcare sectors, it supports the full chip lifecycle—from architecture to production—through both turnkey and design service models. The company works closely with leading semiconductor firms, OEMs, Tier-1s, and global partners across fabrication, OSAT, and IP to enable scalable, future-ready silicon innovation.
Time of India
30-05-2025
- Business
- Time of India
RISC-V can open up locked CPU market: Ananant Systems
NEW DELHI: The RISC-V Instruction Set Architecture (ISA) has the potential to open the tightly locked central processing unit (CPU) architecture, enabling startups and companies to develop chips for various customised applications, said a senior executive of Ananant Systems . Currently, SoftBank-backed chipmaker Arm Holdings licenses its RISC (Reduced Instruction Set Computer) technology to chipmakers like MediaTek and Qualcomm, who then develop processors for smartphones and tablets, while Intel and AMD's x86 CISC (Complex Instruction Set Computer) architecture powers general-purpose laptops and personal computers. Open-source RISC promises to lower the cost of developing affordable chipsets for specialised applications, such as artificial intelligence (AI) inferencing and wireless signal processors, Chitranjan Singh, founder & CEO, Ananant Systems, told ETTelecom in an interview. 'For the last few decades, the CPU architecture has been closed, and there has been no open-source architecture suitable for some of the huge use cases. So, RISC-V is very fit for standalone microcontrollers and embedded applications,' he said. The Bengaluru-headquartered startup, with in-house intellectual property (IP), chip design , semiconductor products, software, and systems, said its digital signal processor (DSP) chip uses RISC-V. CISC processors come with a large instruction set with complex instructions that can perform multiple operations in a single cycle, compared to RISC, which has a smaller instruction set with simpler, more easily executed instructions, making the technology suitable for applications where high-performance, simplicity and efficiency are the main criteria. '...with RISC-V, we can efficiently add a co-processor with specialised instruction sets for particular use cases of wireless signal processing and AI inference,' Singh said. 'Given the adaptability of the architecture, our product will be suitable for other applications like small cell and private 5G.' READ MORE | Ananant Systems working with major local OEMs to develop BSNL's 5G chip But despite the potential of RISC-V, its uptake has been slow. The executive attributed this to a lack of software ecosystem, adding that it may take 10-20 years to build a sizeable software segment that can run on this architecture. The startup is developing a 5G fixed wireless access (FWA) chip, which it says offers more efficiency and cost-savings over the incumbents. It is in discussions with state-controlled Bharat Sanchar Nigam Limited 's ( BSNL ) vendors to this extent. The Ministry of Electronics and IT (MeitY) in 2022 had launched the Digital India RISC-V, or the DIR-V programme, to enable India to realise self-reliance in semiconductors and microprocessors. Rajeev Chandrasekhar, the then minister of state for electronics and IT, had said that RISC-V has emerged as a strong alternative to Arm and Intel x86 in the last 10 years, having no licensing encumbrances, enabling its adoption by "one and all in the semiconductor industry, at different complexity levels for various design purposes". Notably, IIT Madras and the Centre for Development of Advanced Computing (C-DAC) have already developed the SHAKTI Processor and the VEGA Processor, respectively, based on RISC-V.
Scoop
27-05-2025
- Politics
- Scoop
Cook Islands Questions Removal From Global Shipping Database
Article – RNZ Maritime Cook Islands was told in May that it was removed from the Registry Information Sharing Compact due to a 'potential violation'. Caleb Fotheringham, RNZ Pacific Journalist The Cook Islands is seeking clarification on why it was removed from an international shipping database aimed at combating illicit shipping activities. Maritime Cook Islands (MCI) staff were told in May that it was removed from the Registry Information Sharing Compact (RISC) due to a 'potential violation of the Terms and Conditions that was agreed upon at the time of registration'. 'MCI reached out to the founding members of RISC on 8 May 2025 and again on 13 May and again on 21 May. MCI has not had a response from any of them,' a statement from MCI said. 'MCI is at a loss to understand what possible violation has been committed.' The Cook Islands ejection from the information-sharing database was first reported by shipping media Lloyd's List on 20 May. However, the Cook Islans maintains that it does not allow any sanctioned vessels to remain on its register, and has not registered vessels that had been flagged by a RISC member. 'There were no 'terms and conditions' discussed or agreed to at the time that MCI joined RISC.' RISC was formed in 2019 by the world's three largest ship registries: Liberia, the Marshal Islands and Panama. The membership now includes Palau, Saint Kitts and Nevis, Honduras, Vanuatu, Dominica, Belize, Moldova and Antigua and Barbuda. The database allows registries to share details about vessels and avoid clamp down on 'flag hopping' – where a vessel jumps from one registry to another to avoid international sanctions. MCI's statement said the Cook Islands registry was among the first to join after the founding members in May 2020. 'MCI supports the aims and objectives of RISC,' the statement said. It said that in March, during the Cook Islands International Maritime Organisation Legal Committee, the country 'highlighted the RISC compact as an industry best practice'. The Cook Islands-registered ship, Eagle S, was seized on Christmas Day 2024 in the Baltic Sea by Finnish authorities, who believed the vessel severed the Estlink 2 submarine cable that carries electricity from Finland to Estonia. Eagle S is also thought to be linked to Russia's shadow fleet, which seeks to evade sanctions on the sale of Russian oil. Last month, both the Ministry of Transport and Maritime Cook Islands said that the ship has never been under sanctions.
Scoop
27-05-2025
- Business
- Scoop
Cook Islands Questions Removal From Global Shipping Database
Maritime Cook Islands was told in May that it was removed from the Registry Information Sharing Compact due to a 'potential violation'. Caleb Fotheringham, RNZ Pacific Journalist The Cook Islands is seeking clarification on why it was removed from an international shipping database aimed at combating illicit shipping activities. Maritime Cook Islands (MCI) staff were told in May that it was removed from the Registry Information Sharing Compact (RISC) due to a 'potential violation of the Terms and Conditions that was agreed upon at the time of registration'. 'MCI reached out to the founding members of RISC on 8 May 2025 and again on 13 May and again on 21 May. MCI has not had a response from any of them,' a statement from MCI said. 'MCI is at a loss to understand what possible violation has been committed.' The Cook Islands ejection from the information-sharing database was first reported by shipping media Lloyd's List on 20 May. However, the Cook Islans maintains that it does not allow any sanctioned vessels to remain on its register, and has not registered vessels that had been flagged by a RISC member. 'There were no 'terms and conditions' discussed or agreed to at the time that MCI joined RISC.' RISC was formed in 2019 by the world's three largest ship registries: Liberia, the Marshal Islands and Panama. The membership now includes Palau, Saint Kitts and Nevis, Honduras, Vanuatu, Dominica, Belize, Moldova and Antigua and Barbuda. The database allows registries to share details about vessels and avoid clamp down on 'flag hopping' – where a vessel jumps from one registry to another to avoid international sanctions. MCI's statement said the Cook Islands registry was among the first to join after the founding members in May 2020. 'MCI supports the aims and objectives of RISC,' the statement said. It said that in March, during the Cook Islands International Maritime Organisation Legal Committee, the country 'highlighted the RISC compact as an industry best practice'. The Cook Islands-registered ship, Eagle S, was seized on Christmas Day 2024 in the Baltic Sea by Finnish authorities, who believed the vessel severed the Estlink 2 submarine cable that carries electricity from Finland to Estonia. Eagle S is also thought to be linked to Russia's shadow fleet, which seeks to evade sanctions on the sale of Russian oil. Last month, both the Ministry of Transport and Maritime Cook Islands said that the ship has never been under sanctions.
