Latest news with #NagaChandrasekaran
Yahoo
03-05-2025
- Business
- Yahoo
Intel hedges its bet for High-NA EUV with the 14A process node — an alternate Low-NA technique has identical yield and design rules
When you buy through links on our articles, Future and its syndication partners may earn a commission. Intel explained the rationale behind its High-NA EUV strategy at its Intel Foundry Direct 2025 conference this week. Despite persistent questions around cost-effectiveness, Intel has championed its use of the new High-NA EUV chipmaking tool with its forthcoming 14A process. However, Intel has not yet fully committed to using the new tool in production, but it has an alternative production flow of its 14A node that uses standard Low-NA EUV as a backup plan. Intel has already received a second high-NA EUV tool, installed in its Oregon fab, and the company says the technology is progressing well. However, due to continuing development, the ~$400 million ASML Twinscan NXE:5000 High-NA EUV machines haven't been used in a production environment yet, so Intel isn't taking any risks. '[..]The first one is, Intel still has the option to have either a Low-NA or a High-NA solution on our 14A technology, and its design-rule compatible, there will be no impact to the customers, depending on the path that we choose. Second, High-NA EUV is performing to the expectations, and we will introduce it at the right time," said Dr. Naga Chandrasekaran, EVP, CTOO & GM of Intel Foundry Technology and Manufacturing. "We already have data on 18A as well as 14A that shows yield parity between our Low-NA-based solution and a High-NA-based solution. So, we are continuing to make progress on the technology front and ensuring that we have the right options available for us to make sure the solution we deliver to our customers has the lowest risk and the best reward in terms of the decisions we make,' Naga explained. Intel will only use High-NA EUV on a small number of layers of the 14A node (the exact number isn't known), while other machines of varying resolutions will be used for the other layers. That means the decision between the two machines will only impact a select portion of the manufacturing process, but Intel says using triple-patterning with a Low-NA EUV (more below) machine instead of High-NA produces the same results. Because both techniques are design-rule compatible, Intel's customers won't have to change their designs regardless of the company's decision on the final manufacturing flow, either with or without High-NA EUV, which helps defray concerns that customers might have with Intel embracing an as-yet unproven production technology. Additionally, Intel's claim that both production flows offer the same yields signals that there won't be severe time-to-market repercussions if High-NA EUV development hits a snag, or if Intel chooses not to deploy it due to economics. Employing multipatterning often reduces yields, but Intel's claim of yield parity speaks to the advances of modern multipatterning, particularly in the field of overlay technology. Most of the public-facing conversations about High-NA EUV have centered around cost, there's plenty of industry speculation that High-NA isn't as cost-effective as multi-patterning with Low-NA EUV, but there are still numerous technological hurdles to bringing the machines into production. Most of the challenges center around the universe of complementary technologies required to make High-NA viable, like resists, photomasks, and computational lithography, among others, which have to be optimized for the new machines. However, Intel adopted ASML's machine first to get a leg up on the competition, and it has already produced 30,000 wafers using High-NA lithography during the development phase. As a representative explained later in the event, Intel still sees significant cost savings due to eliminating around 40 process steps. 'Finally, I want to talk about High-NA EUV. Why do we do this? It's very simple; It's lower cost. In the middle picture, you see a pattern that has been generated by a single pass High-NA EUV and a pitch that is comparable to the pitch that we need for 14A. The right-hand side shows a very similar pattern generated with a traditional approach, where we use three EUV exposures [triple patterning], and overall about 40 process steps to generate this pattern." "So, overall, we see much shorter, simpler flow, and this is the type of application where we use High-NA in 14A, which reduces the cost compared to the multi-pass 0.33 NA EUV [Low-NA]. Additionally, this provides the option to de-populate the metal layers and get additional performance enhancement.' Intel didn't specify whether or not its comparisons are based on a full-reticle-sized print. High-NA can only print half of a reticle at a time, requiring two prints to create one reticle-sized processor and relying upon stitching to bring the two prints together into a single cohesive unit. In contrast, die that are equal to or smaller than a half-reticle size will only require one print with High-NA EUV. In contrast, Low-NA EUV machines can process a full reticle-sized die in a single print. Intel has plenty of scar tissue from its 10nm node failures that ultimately ended in the company losing its chipmaking lead over TSMC, and it chalks the 10nm issues up to making too many big bets on new manufacturing techniques and technologies at once. The decision to develop an alternative Low-NA production flow is designed to prevent repeating those past mistakes, and Intel has also de-risked other types of advances by developing alternative solutions in the past. For instance, the company developed its new backside power delivery system with the 18A node, an industry first, while simultaneously developing gate-all-around (GAA) transistors, a first for Intel. To ensure a backup plan, the company employed a more robust de-risking strategy with its 18A process that included developing an internal-only trial process node without backside power. However, development went well with both GAA and backside power delivery, so Intel pushed forward with the full version of the 18A node. Intel rival TSMC has confirmed it will not use High-NA with its competing A14 node, and it hasn't indicated when it will employ the new High-NA EUV tool in volume production. Intel had originally planned to use High-NA with its 18A process, which arrives before the 14A node. Intel later changed those plans, saying that the process node's unexpectedly fast development meant the machines wouldn't be ready in time.


TECHx
30-04-2025
- Business
- TECHx
Intel Foundry Unveils New Process and Packaging Updates
Home » Tech Value Chain » Global Brands » Intel Foundry Unveils New Process and Packaging Updates Intel Foundry hosted its Direct Connect 2025 event, revealing progress across process technology, advanced packaging, and manufacturing. The company also introduced new ecosystem programs and partnerships that support its systems foundry strategy. CEO Lip-Bu Tan opened the event, highlighting Intel Foundry's commitment to building a world-class systems foundry. He emphasized customer trust and the importance of an engineering-first culture. Other keynote speakers included Naga Chandrasekaran, chief technology and operations officer, and Kevin O'Buckley, general manager of Foundry Services. Throughout the day, Intel executives were joined by leaders from Synopsys, Cadence, Siemens EDA, PDF Solutions, MediaTek, Microsoft, and Qualcomm. They discussed collaborative efforts to help customers bring innovative products to market. Key Announcements Process Technology Intel Foundry shared early access to its new Intel 14A Process Design Kit (PDK). Multiple customers plan to build test chips on Intel 14A, the successor to Intel 18A. Intel 14A will feature PowerDirect, an enhancement over Intel 18A's PowerVia. Intel 18A is in risk production and will enter volume manufacturing this year. Two variants, Intel 18A-P and 18A-PT, are now in development. Intel 18A-P offers broader performance. Intel 18A-PT uses hybrid bonding with sub-5µm pitch. Intel's first 16nm tape-out is in the fab, with work underway on 12nm nodes in partnership with UMC. Advanced Packaging New offerings include EMIB-T, Foveros-R, and Foveros-B. These technologies enhance 3D stacking and high-bandwidth memory support. Intel is partnering with Amkor to expand packaging flexibility for customers. Manufacturing Intel's Arizona Fab 52 has processed its first 18A wafer. Volume production for 18A will begin in Oregon, with Arizona to follow. Intel 14A and 18A production will remain U.S.-based. Ecosystem Development Intel added new programs to its Foundry Accelerator Alliance. The new Intel Foundry Chiplet Alliance focuses on secure chiplet infrastructure. It aims to support government and commercial applications. The event demonstrated Intel Foundry's growing momentum across multiple fronts. With updates on process nodes, packaging technologies, domestic manufacturing, and ecosystem alliances, Intel continues to position itself as a strong player in the global semiconductor space. Intel Foundry plans to scale these capabilities further to support customers seeking trusted, U.S.-based manufacturing with advanced technology.


CBS News
02-03-2025
- Business
- CBS News
Intel again pushes back expected opening for semiconductor plant in central Ohio
Intel Corp. has again pushed back the expected opening for its semiconductor project in central Ohio. The struggling chipmaker announced Friday that construction on the first of its two factories — known as fabs — planned for New Albany is now expected to be completed in 2030 and begin operations between then and 2031. Construction of the second fab should be done in 2031 and operations should begin in 2032. Intel announced the project in January 2022 and broke ground eight months later at the site in Licking County, just northeast of Columbus. The first plant initially was due to begin operating in 2025, but the project has since been delayed by financial concerns, the departure of its CEO last December and other problems. The company was once a dominant force in the semiconductor industry but has been eclipsed by rival Nvidia, which has cornered the market for chips that run artificial intelligence systems. "We are taking a prudent approach to ensure we complete the project in a financially responsible manner that sets up Ohio One for success well into the future," Naga Chandrasekaran, the executive vice president, chief global operations officer and general manager of Intel Foundry Manufacturing, stated in a message posted on Intel's website. "We will continue construction at a slower pace, while maintaining the flexibility to accelerate work and the start of operations if customer demand warrants." Intel has received $2.2 billion of the $7.8 billion in funding it was due as part of the federal CHIPS Incentives Program. At least $1.5 billion of that funding was set to go toward the New Albany project, according to the U.S. Department of Commerce. Dan Tierney, a spokesperson for Republican Gov. Mike DeWine, called the latest delay a "disappointment" but said the state remains confident in the project.

Al Arabiya
01-03-2025
- Business
- Al Arabiya
Intel slows $28 billion chip factory project in Ohio
Struggling US chip maker Intel on Friday pushed out the timeline for completing two new fabrication plants in Ohio, saying it is taking a prudent approach to the $28 billion project. Chip production originally slated to begin in 2025 at Intel's first new 'fab' in decades is now expected to start in 2030, Intel said in a statement. 'It's important that we align the start of production of our fabs with the needs of our business and broader market demand,' Intel Foundry Manufacturing general manager Naga Chandrasekaran said in a message to employees shared by the company. 'We will continue construction at a slower pace, while maintaining the flexibility to accelerate work and the start of operations if customer demand warrants.' For the full year 2024, Intel recorded a net loss of $18.8 billion as the US chip giant continues to struggle to stake its place in the artificial intelligence revolution. Intel is one of Silicon Valley's most iconic companies, but its fortunes have been eclipsed by Asian powerhouses TSMC and Samsung, which dominate the made-to-order semiconductor business. The company was also caught by surprise with the emergence of Nvidia, a graphics chip maker, as the world's preeminent AI chip provider. Intel CEO Pat Gelsinger was forced out in December after the board lost confidence in his plans to turn the company around. His abrupt departure came just months after the company vowed to cut more than 15,000 jobs in a draconian cost reduction plan and paused or delayed construction on several chipmaking facilities. Former US president Joe Biden's administration last year finalized a $7.9 billion award to Intel as part of an effort to bring semiconductor production to US shores. But in Europe, Intel late last year said it was delaying its plans to build two mega chip-making factories in Germany and Poland as the company faces lower demand than anticipated. Intel also said at the time that it would pull back on its projects in Malaysia.
Yahoo
01-03-2025
- Business
- Yahoo
Intel slows $28 bn chip factory project in Ohio
Struggling US chip maker Intel on Friday pushed out the timeline for completing two new fabrication plants in Ohio, saying it is taking a prudent approach to the $28 billion project. Chip production originally slated to begin in 2025 at Intel's first new "fab" in decades is now expected to start in 2030, Intel said in a statement. "It's important that we align the start of production of our fabs with the needs of our business and broader market demand," Intel Foundry Manufacturing general manager Naga Chandrasekaran said in a message to employees shared by the company. "We will continue construction at a slower pace, while maintaining the flexibility to accelerate work and the start of operations if customer demand warrants." For the full year 2024, Intel recorded a net loss of $18.8 billion as the US chip giant continues to struggle to stake its place in the artificial intelligence revolution. Intel is one of Silicon Valley's most iconic companies, but its fortunes have been eclipsed by Asian powerhouses TSMC and Samsung, which dominate the made-to-order semiconductor business. The company was also caught by surprise with the emergence of Nvidia, a graphics chip maker, as the world's preeminent AI chip provider. Intel CEO Pat Gelsinger was forced out in December after the board lost confidence in his plans to turn the company around. His abrupt departure came just months after the company vowed to cut more than 15,000 jobs in a draconian cost reduction plan and paused or delayed construction on several chipmaking facilities. Former US president Joe Biden's administration last year finalized a $7.9 billion award to Intel as part of an effort to bring semiconductor production to US shores. But in Europe, Intel late last year said it was delaying its plans to build two mega chip-making factories in Germany and Poland as the company faces lower demand than anticipated. Intel also said at the time that it would pull back on its projects in Malaysia. gc/wd Sign in to access your portfolio