Latest news with #UCIe
National Post
5 days ago
- Business
- National Post
Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
Article content First UCIe Die-to-Die IP Subsystem on TSMC's 2nm Process with CoWoS ® Advanced Packaging Technology Delivers 11.8 Tbps/mm Bandwidth Density and a Scalable Path for 64G Die to Die Interconnects Article content LONDON & TORONTO — Alphawave Semi (LSE: AWE), a global leader in high-speed connectivity and compute silicon for the world's technology infrastructure, announced the successful tape out of one of the industry's first UCIe™ IP subsystem on TSMC's N2 process, supporting 36G die-to-die data rates. The solution is fully integrated with TSMC's Chip-on-Wafer-on-Substrate (CoWoS ®) advanced packaging technology, unlocking breakthrough bandwidth density and scalability for next-generation chiplet architectures. Article content This milestone builds on the recent release of the Alphawave Semi AI Platform, proving readiness to support the future of disaggregated SoCs and scale-up infrastructure for hyperscale AI and HPC workloads. With this tape-out, Alphawave Semi becomes one of the industry's first to enable UCIe connectivity on 2nm nanosheet technology, marking a major step forward for the open chiplet ecosystem. Article content 'We're proud to lead the industry into the N2 era with the first UCIe IP on this advanced node,' said Mohit Gupta, Senior VP & GM, Custom Silicon & IP, Alphawave Semi. 'Our 36G subsystem validates a new class of high-density, power-efficient chiplet connectivity and paves the way for 64G UCIe and beyond—critical for AI and high-radix networking applications.' Article content Alphawave Semi's one of the industry's first UCIe IP subsystem on TSMC's 2nm process delivers 36G performance with 11.8 Tbps/mm bandwidth density, ultra-low power and latency, and advanced features like live per-lane health monitoring and comprehensive testability. Compliant with UCIe 2.0 standard and supporting multi protocols, including PCIe ®, CXL™, AXI, CHI and more with Alphawave Semi's highly configurable and efficient Streaming Protocol D2D Controller. Article content Alphawave Semi is advancing key ecosystem collaborations to enable groundbreaking technologies, leveraging D2D-based open chiplet interoperability to drive a broader AI connectivity platform for the industry. Alphawave Semi's UCIe IP on the TSMC N2 process affirms its position as one of the leading enablers of scalable, open chiplet ecosystems. Article content 'Our latest collaboration with Alphawave Semi underscores our shared commitment to driving advancements in high-performance computing through design solutions that fully leverage the performance and energy-efficiency advantages of TSMC's advanced process and packaging technologies,' said Lipen Yuan, Senior Director of Advanced Technology Business Development at TSMC. 'This milestone illustrates how close collaboration with our Open Innovation Platform ® (OIP) partners like Alphawave Semi can enable the quick delivery of advanced interface IP and custom silicon solutions to meet the increasing demands of AI and cloud infrastructure.' Article content Alphawave Semi is already executing on its plans to deliver next-generation UCIe solutions, with 64G UCIe support — empowering AI and HPC customers to lead in a rapidly evolving chiplet-driven landscape. Article content About Alphawave Semi Article content Alphawave Semi is a global leader in high-speed connectivity and compute silicon for the world's technology infrastructure. Faced with the exponential growth of data, Alphawave Semi's technology services a critical need: enabling data to travel faster, more reliably, and with higher performance at lower power. We are a vertically integrated semiconductor company, and our IP, custom silicon, and connectivity products are deployed by global tier-one customers in datacenters, compute, networking, AI, 5G, autonomous vehicles, and storage. Founded in 2017 by an expert technical team with a proven track record in licensing semiconductor IP, our mission is to accelerate the critical data infrastructure at the heart of our digital world. To find out more about Alphawave Semi, visit: Article content Article content Article content Article content Article content Contacts Article content Media Contact: Article content Article content Claudia Cano-Manuel Article content Article content Article content
Yahoo
16-05-2025
- Business
- Yahoo
InPsytech Joins Samsung SAFE™ IP Partner Program for Excellence in ONFI and UCIe IP Solutions
HSINCHU, May 16, 2025 /PRNewswire/ -- InPsytech, a leading provider of advanced silicon intellectual property (IP) solutions, also a member of Egis (6452 TWO) Group, is proud to announce that it has joined the Samsung SAFE™ IP Program as a partner, one of the highest honors granted to ecosystem partners within Samsung's Advanced Foundry Ecosystem (SAFE™). This recognizes InPsytech's exceptional contributions in delivering cutting-edge ONFI (Open NAND Flash Interface). InPsytech will expand IP portfolio in Samsung Foundry including UCIe IP solutions for multi-die applications and UCIe (Universal Chiplet Interconnect Express) IP solutions. The Samsung SAFE™ program is designed to foster close collaboration between Samsung Foundry and its partners, encouraging innovation and efficiency across the semiconductor design ecosystem. By honoring outstanding IP providers, Samsung highlights those who enable next-generation semiconductor performance and integration. InPsytech's ONFI IP enables high-speed, low-power NAND flash memory interfaces, widely adopted in storage and embedded applications which owns the latest version SCA (SEPARATE COMMAND ADDRESS) validation, DFE functionality support, Intelligent power management and Complete PHY+IO solution. Meanwhile, the UCIe IP solution provides high-bandwidth, low-latency chiplet-to-chiplet interconnect capabilities, facilitating seamless integration in advanced multi-die architectures and accelerating the adoption of chiplet-based system design. "We are truly honored to have been recognized as the Samsung SAFE™ IP Partner," Grace Leu, VP of Sales & Marketing of InPsytech said. "This recognition affirms our dedication to delivering industry-leading IP that meets the most demanding performance and reliability standards. We look forward to continued collaboration with Samsung to drive innovation across global semiconductor markets." Regarding this collaboration, Ben Hyo Gyuem Rhew, Vice President and Head of the Foundry IP Development Team at Samsung Electronics, stated, "This partnership highlights the strong synergy between both parties in terms of technology and market strategy. We are pleased to see this cooperation unfold and look forward to creating greater innovation together." The recognition further solidifies InPsytech's position as a trusted partner in the global semiconductor ecosystem and reinforces its commitment to advancing the design and scalability of future chip solutions. About InPsytech InPsytech is a Taiwan-based silicon IP company specializing in high-performance interface, memory, and interconnect IP solutions. The company is dedicated to empowering SoC designers through robust, scalable IP optimized for applications in AI, data centers, mobile, and edge computing. InPsytech partners with global foundries and design ecosystems to deliver IP solutions that accelerate time-to-market and enable next-generation semiconductor innovations. For more information, please visit View original content: SOURCE InPsytech
