Latest news with #MohitGupta
National Post
2 days ago
- Business
- National Post
Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
Article content First UCIe Die-to-Die IP Subsystem on TSMC's 2nm Process with CoWoS ® Advanced Packaging Technology Delivers 11.8 Tbps/mm Bandwidth Density and a Scalable Path for 64G Die to Die Interconnects Article content LONDON & TORONTO — Alphawave Semi (LSE: AWE), a global leader in high-speed connectivity and compute silicon for the world's technology infrastructure, announced the successful tape out of one of the industry's first UCIe™ IP subsystem on TSMC's N2 process, supporting 36G die-to-die data rates. The solution is fully integrated with TSMC's Chip-on-Wafer-on-Substrate (CoWoS ®) advanced packaging technology, unlocking breakthrough bandwidth density and scalability for next-generation chiplet architectures. Article content This milestone builds on the recent release of the Alphawave Semi AI Platform, proving readiness to support the future of disaggregated SoCs and scale-up infrastructure for hyperscale AI and HPC workloads. With this tape-out, Alphawave Semi becomes one of the industry's first to enable UCIe connectivity on 2nm nanosheet technology, marking a major step forward for the open chiplet ecosystem. Article content 'We're proud to lead the industry into the N2 era with the first UCIe IP on this advanced node,' said Mohit Gupta, Senior VP & GM, Custom Silicon & IP, Alphawave Semi. 'Our 36G subsystem validates a new class of high-density, power-efficient chiplet connectivity and paves the way for 64G UCIe and beyond—critical for AI and high-radix networking applications.' Article content Alphawave Semi's one of the industry's first UCIe IP subsystem on TSMC's 2nm process delivers 36G performance with 11.8 Tbps/mm bandwidth density, ultra-low power and latency, and advanced features like live per-lane health monitoring and comprehensive testability. Compliant with UCIe 2.0 standard and supporting multi protocols, including PCIe ®, CXL™, AXI, CHI and more with Alphawave Semi's highly configurable and efficient Streaming Protocol D2D Controller. Article content Alphawave Semi is advancing key ecosystem collaborations to enable groundbreaking technologies, leveraging D2D-based open chiplet interoperability to drive a broader AI connectivity platform for the industry. Alphawave Semi's UCIe IP on the TSMC N2 process affirms its position as one of the leading enablers of scalable, open chiplet ecosystems. Article content 'Our latest collaboration with Alphawave Semi underscores our shared commitment to driving advancements in high-performance computing through design solutions that fully leverage the performance and energy-efficiency advantages of TSMC's advanced process and packaging technologies,' said Lipen Yuan, Senior Director of Advanced Technology Business Development at TSMC. 'This milestone illustrates how close collaboration with our Open Innovation Platform ® (OIP) partners like Alphawave Semi can enable the quick delivery of advanced interface IP and custom silicon solutions to meet the increasing demands of AI and cloud infrastructure.' Article content Alphawave Semi is already executing on its plans to deliver next-generation UCIe solutions, with 64G UCIe support — empowering AI and HPC customers to lead in a rapidly evolving chiplet-driven landscape. Article content About Alphawave Semi Article content Alphawave Semi is a global leader in high-speed connectivity and compute silicon for the world's technology infrastructure. Faced with the exponential growth of data, Alphawave Semi's technology services a critical need: enabling data to travel faster, more reliably, and with higher performance at lower power. We are a vertically integrated semiconductor company, and our IP, custom silicon, and connectivity products are deployed by global tier-one customers in datacenters, compute, networking, AI, 5G, autonomous vehicles, and storage. Founded in 2017 by an expert technical team with a proven track record in licensing semiconductor IP, our mission is to accelerate the critical data infrastructure at the heart of our digital world. To find out more about Alphawave Semi, visit: Article content Article content Article content Article content Article content Contacts Article content Media Contact: Article content Article content Claudia Cano-Manuel Article content Article content Article content
Business Wire
2 days ago
- Automotive
- Business Wire
Alphawave Semi Tapes Out Breakthrough 36G UCIe™ IP on TSMC 2nm, Unlocking Foundational AI Platform IP on Nanosheet Processes
LONDON & TORONTO--(BUSINESS WIRE)-- Alphawave Semi (LSE: AWE), a global leader in high-speed connectivity and compute silicon for the world's technology infrastructure, announced the successful tape out of one of the industry's first UCIe™ IP subsystem on TSMC's N2 process, supporting 36G die-to-die data rates. The solution is fully integrated with TSMC's Chip-on-Wafer-on-Substrate (CoWoS ®) advanced packaging technology, unlocking breakthrough bandwidth density and scalability for next-generation chiplet architectures. This milestone builds on the recent release of the Alphawave Semi AI Platform, proving readiness to support the future of disaggregated SoCs and scale-up infrastructure for hyperscale AI and HPC workloads. With this tape-out, Alphawave Semi becomes one of the industry's first to enable UCIe connectivity on 2nm nanosheet technology, marking a major step forward for the open chiplet ecosystem. 'We're proud to lead the industry into the N2 era with the first UCIe IP on this advanced node,' said Mohit Gupta, Senior VP & GM, Custom Silicon & IP, Alphawave Semi. 'Our 36G subsystem validates a new class of high-density, power-efficient chiplet connectivity and paves the way for 64G UCIe and beyond—critical for AI and high-radix networking applications.' Alphawave Semi's one of the industry's first UCIe IP subsystem on TSMC's 2nm process delivers 36G performance with 11.8 Tbps/mm bandwidth density, ultra-low power and latency, and advanced features like live per-lane health monitoring and comprehensive testability. Compliant with UCIe 2.0 standard and supporting multi protocols, including PCIe ®, CXL™, AXI, CHI and more with Alphawave Semi's highly configurable and efficient Streaming Protocol D2D Controller. Alphawave Semi is advancing key ecosystem collaborations to enable groundbreaking technologies, leveraging D2D-based open chiplet interoperability to drive a broader AI connectivity platform for the industry. Alphawave Semi's UCIe IP on the TSMC N2 process affirms its position as one of the leading enablers of scalable, open chiplet ecosystems. 'Our latest collaboration with Alphawave Semi underscores our shared commitment to driving advancements in high-performance computing through design solutions that fully leverage the performance and energy-efficiency advantages of TSMC's advanced process and packaging technologies,' said Lipen Yuan, Senior Director of Advanced Technology Business Development at TSMC. 'This milestone illustrates how close collaboration with our Open Innovation Platform ® (OIP) partners like Alphawave Semi can enable the quick delivery of advanced interface IP and custom silicon solutions to meet the increasing demands of AI and cloud infrastructure.' Alphawave Semi is already executing on its plans to deliver next-generation UCIe solutions, with 64G UCIe support — empowering AI and HPC customers to lead in a rapidly evolving chiplet-driven landscape. About Alphawave Semi Alphawave Semi is a global leader in high-speed connectivity and compute silicon for the world's technology infrastructure. Faced with the exponential growth of data, Alphawave Semi's technology services a critical need: enabling data to travel faster, more reliably, and with higher performance at lower power. We are a vertically integrated semiconductor company, and our IP, custom silicon, and connectivity products are deployed by global tier-one customers in datacenters, compute, networking, AI, 5G, autonomous vehicles, and storage. Founded in 2017 by an expert technical team with a proven track record in licensing semiconductor IP, our mission is to accelerate the critical data infrastructure at the heart of our digital world. To find out more about Alphawave Semi, visit: Alphawave Semi and the Alphawave Semi logo are trademarks of Alphawave IP Group plc. All rights reserved.
Time of India
3 days ago
- Business
- Time of India
Power bill shocker: Pkl locals ready to knock at HERC doors
Panchkula: Concerned residents of Panchkula have come together to draft and circulate a petition in response to a recent steep increase in power bills. The petition, drafted by the Federation of Residents Associations (FORA), an umbrella body of residents welfare associations, will be formally submitted to the Haryana Electricity Regulatory Commission on Thursday in a bid to challenge and reduce the hike. Tired of too many ads? go ad free now Residents have shown solidarity and pushed for fair and affordable utility pricing. "We studied different bills and found that the cumulative effect of this revision, as notified by the respondent, is not only excessive and disproportionate but also amounts to an unjust enrichment by way of inflated charges imposed on consumers without adequate justification or supporting cost analysis. These arbitrary escalations, especially in the domestic and industrial sectors, violate the principle of reasonableness in tariff setting, fail to protect the consumer interest envisaged under the Electricity Act, 2003, and merit urgent judicial scrutiny," said RP Malhotra, president, FORA. "Thus, we are moving the petition Thursday. During elections, we were told that no power rates would be hiked, but the opposite happened, that too unannounced. Fixed charges are adding to a huge increase," he added. Solution Box's founder Mohit Gupta said, "At this stage, very few people understand the implications. It is around Rs 10,000 per year for 10 kW+ connections and Rs 4,000 per year for 5 kW connections. Add to this the enhanced slab rates. It will make a huge impact on small and medium domestic consumers." B R Mehta, a Sector 25 resident, said, "How will HERC justify before the court of law when challenged legally that consumers with much higher consumption are getting much lower bills than consumers with much lower consumption being asked to pay much higher amounts of bills?" Many residents said they have received bills with an increase of almost 100 to 400% compared to last year's bill. They are calling it illogical while the power department has said they have prepared bills as per commission's revised order. The Haryana Electricity Regulatory Commission had raised domestic and industrial categories from 20 to 30 paise per kWh (kilowatt hours)/kVAh from last year. MSID:: 121627153 413 |
Time of India
4 days ago
- Business
- Time of India
Steep power bill increase comes as shock for Pkl residents
Residents of Panchkula have received electricity bills showing increase of 100% to 400% for the period from mid-April to mid-May, compared to the previous year, despite minimal changes in unit consumption. While the Haryana Electricity Regulatory Commission implemented a rate increase of 20 to 30 paise per kWh/kVAh for domestic and industrial categories, an analysis of various bills reveals disproportionate charges despite marginal increase in consumption. This has had a particularly adverse effect on middle-class families, the economically disadvantaged and pensioners. S K Nayar, Citizens' Welfare Association president from Sector 15, experienced a 145% increase in charges while maintaining similar consumption. His bill rose to Rs 2,042 for 210 units, compared to Rs 833 for 216 units in April 2024. "It is a loot of public money, and a wrong step was taken. Earlier, there used to be a minimum charge, and even if you went out of the city for a few months, the bill amount would not pinch you. But they are imposing fixed charges, which have burned a hole in the pockets of the common man," he rued. Sector 25 resident Mohit Gupta received a bill of Rs 5,641 for 668.25 units, while last April's bill was Rs 2,673 for 496.23 units. Despite lower consumption previously, this year's rate increase has resulted in substantially higher charges. Sant Singh Gill, former RWA president of Sector 25, saw his bill increase to Rs 3,745, as compared to Rs 1,286 last year, representing a 191% rise in charges against a 47% increase in consumption. Analysis shows varied impacts: Cases with abnormal consumption increases saw 430% higher bills, while 38% consumption increases resulted in 111% higher bills. Even with 21% reduced consumption, bills increased by 87%. Uttar Haryana Bijli Vitran Nigam (UHBVNL) chief engineer (Operations) Chandan Singh said, "The bills have been generated as per HERC's current rates. Some may have felt bills are higher because consumption has increased. As far as fixed charges are concerned, it is a certain amount for certain uses." The 2025-26 electricity order confirms rate increases of 20 to 30 paise per kWh/kVAh for both domestic and industrial categories in Haryana.
Time of India
30-05-2025
- Politics
- Time of India
Panchkula admin does it again, fails to communicate mock drill cancellation
1 2 3 Panchkula: Once again, the Panchkula administration has come under fire for its lack of preparedness and poor communication. Despite earlier announcements about a mock drill and blackout scheduled for Wednesday night, the administration failed to inform residents about its cancellation, leaving many confused and uncertain. This stands in stark contrast to Chandigarh and Gurugram, where respective administrations not only announced the drill under Operation Shield in the evening but also promptly informed the public of its cancellation later that night. Although the Haryana government issued a general cancellation notice, Panchkula deputy commissioner had made a separate announcement earlier, leading to confusion among residents about whether the drill was still on in Panchkula. The district administration only issued a clarification the following morning via the director public relations WhatsApp group. Blackout Timings Changed Thrice Adding to the confusion, the administration changed the blackout timings three times. Initially, a press release announced the blackout from 8 pm to 8.15 pm. Minutes later, the message was deleted from the official WhatsApp group. Upon inquiry, officials stated the new timing was 10 pm to 10.15 pm. by Taboola by Taboola Sponsored Links Sponsored Links Promoted Links Promoted Links You May Like Giao dịch vàng CFDs với sàn môi giới tin cậy IC Markets Tìm hiểu thêm Undo Eventually, a final press release revised the timing again to 11 pm to 11.15 pm. "The Panchkula administration should be responsive and responsible during such times. Even during Covid, we faced similar issues with communication. Why does the administration remain inactive while others lead?" said Mohit Gupta, founder of the Solution Box forum. "Residents were left confused and uninformed last night." Weeklong Training Ends in a Day In another instance of poor planning, the administration had announced a weeklong civil defence training for volunteers in response to India-Pakistan tensions. However, due to a lack of awareness and last-minute communication, very few people turned up. The training, which was supposed to last a week, ended abruptly in a single day without any formal announcement. Inactive Social Media Presence Residents also pointed out the lack of digital communication. While the verified X (formerly Twitter) accounts of the Chandigarh and Mohali DCs are regularly updated with public announcements and initiatives, Panchkula DC's unverified X account has been inactive since Sep 29, 2024. Many residents said they feel left out and find the silence from the administration unusual. When contacted, DC Monika Gupta said, "Information was shared as soon as directions were received from higher authority."
