Latest news with #SassineGhazi
CNBC
29-05-2025
- Business
- CNBC
Synopsys pulls full-year guidance, citing new China export restrictions
Synopsys pulled its guidance for the full fiscal year on Thursday, citing a letter it received from the U.S. Commerce Department on restrictions of sales of its products in China. The stock dropped about 3%. The announcement comes one day after Synopsys CEO Sassine Ghazi disputed a report that the White House told the company, as well as rivals Cadence and Siemens, to stop selling to clients in China. He said he had wanted to address the swirling of speculation. "Synopsys is currently assessing the potential impact of the BIS Letter on its business, operating results and financial condition," the company said in a statement on Thursday. On a conference call with analysts on Wednesday, Ghazi had said the company saw a slowdown in China during its fiscal second quarter, which ended on April 30. "Recall as we started sometime in FY 2024 communicating that we are seeing both a cumulative impact of the restrictions in China as well as the macro situation inside China have caused us to continue on communicating that this deceleration will continue, and that headwind has gotten stronger as we go through the each quarter over the last year, year and a half," he said.
Business Times
29-05-2025
- Business
- Business Times
US curbs chip design software, chemicals, other shipments to China
[WASHINGTON] The United States has ordered a broad swathe of companies to stop shipping goods to China without a licence and revoked licences already granted to certain suppliers, said three people familiar with the matter. The new restrictions – which are likely to escalate tensions with Beijing – appear aimed at choke points to prevent China from getting products necessary for key sectors, one of the people said. Products affected include design software and chemicals for semiconductors, butane and ethane, machine tools, and aviation equipment, the people said. Many companies received letters from the US Department of Commerce over the last few days informing them of the new restrictions. Firms that supply electronic design automation (EDA) software for semiconductors were sent letters on May 23 that licences would now be needed to ship to Chinese customers, two of the sources said. The electronic design automation software makers include Cadence, Synopsys and Siemens EDA, one said. BT in your inbox Start and end each day with the latest news stories and analyses delivered straight to your inbox. Sign Up Sign Up The two sources said the Commerce Department will review requests for licences to ship to China on a case-by-case basis, suggesting the action was not an outright ban. It is unclear whether the new restrictions are part of a broader strategy to create leverage for trade talks during a pause in the imposition of higher tariffs. The Commerce Department said it is reviewing exports of strategic significance to China, while noting 'in some cases, Commerce has suspended existing export licences or imposed additional licence requirements while the review is pending.' The White House did not immediately respond to a request for comment. Shares of Cadence, which declined to comment, closed down 10.7 per cent and shares of Synopsys fell 9.6 per cent. Synopsys' CEO Sassine Ghazi said in a call with analysts that the company had not received a letter nor had it heard from the Commerce Department's Bureau of Industry and Security, which enforces export controls. 'We are aware of the reporting and speculations, but Synopsys has not received a notice from BIS ... We have not received a letter,' Ghazi said. After the market closed, Synopsys reaffirmed its revenue forecast for 2025. Its shares and those of Cadence bounced back 3.5 per cent in trading after the close. Siemens EDA did not immediately respond to a request for comment. Restricting Chinese firms' access to EDA tools would be a big blow to the industry as Chinese chip design customers heavily rely on top-of-the-line US software. In April, Chinese state news agency Xinhua said Synopsys, Cadence and Siemens's Mentor Graphics together control more than 70 per cent of the market share in China. Chinese companies that have said they use Synopsys and Cadence software include design firm Brite Semiconductor, Zhuhai Jieli and semiconductor IP portfolio provider VeriSilicon. VeriSilicon and Brite did not immediately respond to emails seeking comment. Calls to Zhuhai Jielei went unanswered. 'Choke point' However, three sources familiar with the matter in the EDA tools industry said on Thursday (May 29) that business was still carrying on normally in China as companies awaited more clarification on how the restrictions need to be implemented. 'I believe this is another ineffective measure that will only help China advance its self-reliance, just like with semiconductors,' said Nori Chiou, investment director at Singapore-headquartered White Oak Capital Partners, adding that there are many pirated versions of these design tools, which are not hard to obtain. Chiou said once legitimate channels are blocked, many Chinese EDA companies will benefit. Domestic alternatives to the US firms' tools include Empyrean Technology and Primarius Technologies, whose shares jumped 17 per cent and 20 per cent respectively. In 2023, Huawei said it had developed its own EDA tools for chip designs that can be produced at 14-nanometre or more advanced technology. It has been blocked from using US suppliers since 2019. Any move to strip the software makers of their Chinese customers could deal a blow to their bottom. 'They are the true choke point,' said a former Commerce Department official, who added that rules restricting the export of EDA tools to China have been under consideration since the first Trump administration, but were ruled out as too aggressive. Synopsys relies on China for about 16 per cent of its annual revenue, and China accounts for about 12 per cent of annual revenue for Cadence. Synopsys, which partners with chip companies such as Nvidia, Qualcomm and Intel, provides software and hardware used for designing advanced processors. The Financial Times earlier reported that the Trump administration had ordered the software firms to stop selling their services to Chinese groups. REUTERS
Time of India
29-05-2025
- Business
- Time of India
US curbs export controls on chip design software and tools to China
The United States has imposed new export restrictions targeting a wide range of goods shipped to China, including semiconductor design software, chemicals, and industrial tools, Reuters reported, quoting sources. These new controls, likely to heighten Beijing-Washington tensions, target critical supply points to restrict China's access to essential sector components. The affected items include semiconductor design software, chemical compounds like butane and ethane, industrial machinery, and aviation-related equipment. The US commerce department recently dispatched notifications to various companies about these enhanced restrictions. Last Friday, companies providing electronic design automation (EDA) software for semiconductors were informed about new licensing requirements for Chinese customers, according to two Reuters. The Department confirmed its ongoing assessment of strategic exports to China, stating that "in some cases, Commerce has suspended existing export licenses or imposed additional license requirements while the review is pending." Cadence shares dropped 10.7% whilst Synopsys fell 9.6%. Synopsys' CEO Sassine Ghazi clarified during an analyst call that they hadn't received any communication from the Bureau of Industry and Security. "We are aware of the reporting and speculations, but Synopsys has not received a notice from BIS ... We have not received a letter," Ghazi stated. Post-market trading saw both companies recover somewhat, with 3.5% gains. Synopsys maintained its 2025 revenue projections. The potential removal of Chinese customers could substantially affect these companies' revenues and Chinese chip design capabilities. A former Commerce Department official noted these EDA tools are crucial control points, revealing that similar restrictions were considered during Trump's presidency but deemed too severe. Chinese markets represent significant revenue streams for these companies, with China contributing approximately 16% for Synopsys and 12% for Cadence. Stay informed with the latest business news, updates on bank holidays and public holidays . AI Masterclass for Students. Upskill Young Ones Today!– Join Now
Reuters
28-05-2025
- Business
- Reuters
US FTC will require Synopsys, Ansys to divest certain assets to resolve merger concerns
WASHINGTON, May 28 (Reuters) - The U.S. Federal Trade Commission said on Wednesday it will require two software companies —Synopsys (SNPS.O), opens new tab and Ansys (ANSS.O), opens new tab— to divest certain assets to resolve antitrust concerns surrounding their $35 billion merger. The proposed divestiture will preserve competition across several software tool markets that are critical for the design of semiconductors and light simulation devices, according to the commission. The FTC added that it will help protect consumers from higher input prices for cars, phones and other items. Synopsys is a leading developer and supplier used to design semiconductors, while Ansys provides simulation software tools used for testing products including semiconductors. During an earnings call earlier on Wednesday, Synopsys CEO Sassine Ghazi said the company has regulatory clearances in all jurisdictions excluding China. "We are working cooperatively and actively negotiating ... to secure China regulatory clearance and we continue to anticipate closing in the first half of this year," Ghazi said.
Forbes
29-04-2025
- Business
- Forbes
Intel Foundry And Synopsys Collaborate To Fast-Track 18A Chip Development
Intel CEO Lip-Bu Tan On Stage At Intel Foundry Direct Connect With Synopsys President And CEO ... More Sassine Ghazi In a joint announcement reflecting the growing importance of ecosystem collaboration in semiconductor design, Synopsys and Intel Foundry have expanded their partnership in support of chip development on Intel's 18A and 18A-P process technologies. This engagement aims to streamline and scale next-generation chip design for applications in AI, HPC, data center, client PC and mobile platforms. As Intel continues to evolve its foundry strategy under the leadership of its new CEO Lip-Bu Tan, collaborations with EDA and core IP providers like Synopsys are key to enabling a competitive and accessible design infrastructure for customers targeting Intel's new advanced process nodes. At the center of the announcement is Intel's 18A chip process, which introduces RibbonFET (Intel's gate-all-around transistor design) and PowerVia (backside power delivery), among other cutting-edge semiconductor design technologies. These innovations are key enablers that improve both performance and power efficiency of chips built on Intel processes at scale. Intel's 18A-P variant builds on this by offering additional optimization for performance-critical applications, and with better transistor density as well. Synopsys Electronic Design Automation Tools And IP Solutions To Accelerate Chip Design On Intel 18A To help design teams adopt these nodes effectively, Synopsys has certified its digital and analog EDA flows for Intel 18A, and those flows are now production-ready for 18A-P. Synopsys also provides a broad library of silicon-proven IP, including chip and system interfaces and foundation IP essential for building advanced system-on-chip designs. The availability of validated tools and IP is critical for customers seeking to reduce development timelines and manage risk when targeting these advanced chip fab nodes. In addition to process design support, the partnership also includes an optimized EDA reference flow for Intel's EMIB-T (Embedded Multi-die Interconnect Bridge Technology), a 2.5D advanced chip packaging solution that facilitates high-bandwidth integration across multiple dies within a single package. The reference flow supports a unified exploration-to-signoff platform, allowing design teams to manage 2.5D and 3D multi-die architectures more efficiently. This is particularly relevant as chip and system-level integration increasingly supplements traditional semiconductor node scaling (Moore's Law) in driving performance and functionality. Intel EMIB-T 2.5D Packaging Technology For Multi-Die System On Chip Designs EMIB-T and related advanced chip packaging technologies are an Intel strong suit for next-generation designs, particularly in data center AI applications, where compute density with better memory proximity helps drive performance. A certified EDA flow can reduce the complexity associated with these packaging technologies and support greater adoption across the industry. Looking ahead, Synopsys and Intel Foundry are also working together on early design enablement for Intel's 14A-E node, which is currently in development. While technical details are still scarce, 14A-E is expected to extend the architectural and manufacturing improvements introduced with 18A with 15 to 20% better performance-per-watt characteristics. By engaging early in the development of tools, flows and IP for 14A-E, the two companies aim to ensure that design infrastructure is in place when the process becomes commercially available, currently slated for late 2026 into early 2027. This approach reflects a broader trend toward concurrent design tool process co-optimization as process chip manufacturing nodes become more complex. This collaboration is aligned with Intel Foundry's broader strategy to build a complete ecosystem of tools, IP, and packaging capabilities that lower the barrier for entry for fabless semiconductor companies, like NVIDIA, Qualcomm, AMD, Broadcom, hot chip and tech start-ups, and many others. Having production-ready flows and validated IP in place is essential for serving both internal product groups at Intel and external customers. For Synopsys, the partnership reinforces its leadership in EDA enablement at advanced nodes and its commitment to supporting emerging packaging and system-level design methodologies. As complexity rises across the design stack, the need for integrated, validated solutions will continue to grow. From a market perspective, the announcement reflects how ecosystem partnerships are becoming foundational to delivering innovation at the angstrom scale. By working in parallel across process development, packaging and design flows, Intel and Synopsys customers can mitigate risk and shorten development cycles. The expanded collaboration between Synopsys and Intel Foundry provides a structured path for design teams targeting Intel's advanced process technologies, including 18A, 18A-P, and the future 14A-E node. With certified EDA flows, a broad IP portfolio, and advanced packaging support for EMIB-T, the partnership addresses key challenges in modern chip development. It will be interesting to track how the two companies progress as new external customers adopt Intel's 18A and advanced process nodes for state-side manufacturing here in the US.
