Latest news with #LPDDR6
Yahoo
14-07-2025
- Business
- Yahoo
CDNS Unveils LPDDR6/5X Memory IP System for Next-Gen AI & HPC Workload
Cadence Design Systems (CDNS) recently announced the tapeout of the industry's first LPDDR6/5X memory IP system solution, capable of operating at an impressive 14.4Gbps—a 50% speed boost over previous LPDDR generations. The state-of-the-art IP system not only advances the frontiers of AI infrastructure but also caters to high-performance computing (HPC), data centers and mobile applications by enabling faster data movement, lower latency and scalable integration options. The Cadence IP for the JEDEC LPDDR6/5X standard features a sophisticated PHY architecture combined with a high-performance controller, optimized to deliver exceptional power, performance and area (PPA) efficiency. It provides comprehensive support for both LPDDR6 and LPDDR5X DRAM protocols, ensuring maximum design flexibility. This solution seamlessly integrates into conventional monolithic SoCs as well as advanced multi-die systems by leveraging the Cadence chiplet framework. Notably, this framework, built on the success of the previous LPDDR generation, was successfully taped out in 2024, highlighting its viability for heterogeneous chiplet integration. The integrated PHY and controller memory solution features a cutting-edge, high-performance architecture that is both scalable and adaptable, building on Cadence's well-established DDR5 (12.8Gbps), LPDDR5X (10.7Gbps) and GDDR7 (36G) product lines. As the inaugural release in Cadence's new LPDDR6 IP portfolio, this offering provides full support for the LPDDR6 and LPDDR5X standards, including compatibility with LPDDR5X CAMM2, ensuring robust performance and broad applicability. Designed to serve diverse markets including AI, mobile, consumer electronics, enterprise HPC, and cloud data centers, this advanced LPDDR6/5X memory IP solution delivers improved flexibility to meet varying performance, capacity and cost requirements, supporting extended product lifecycles. The LPDDR6/5X PHY can be tailored to different package and system configurations and is offered as a drop-in hardened macro. This enables quick, reliable integration, significantly accelerating time-to-market for end products. The Cadence LPDDR6/5X controller offers a comprehensive suite of standard and advanced features for memory interfaces, including compatibility with the Arm AMBA AXI bus. Delivered as a soft RTL macro, the controller provides designers with maximum flexibility to optimize features, power, area and performance to suit their specific application needs. Cadence extends its solutions beyond silicon by offering a comprehensive LPDDR6 Memory Model. This model enables engineering teams to conduct thorough protocol checks, achieve functional coverage and follow a defined verification plan to ensure JEDEC compliance. This helps reduce the verification burden on system designers and accelerates the time-to-market for next-generation SoCs adopting LPDDR6. Additionally, this LPDDR6/5X memory IP is part of Cadence's extensive memory IP suite, which also offers DDR, GDDR and HBM technologies. When combined with Cadence's leading analog/mixed-signal tools and UCIe-based chiplet frameworks, customers can develop complete systems with optimized performance and faster time-to-market. Cadence's performance is being boosted by solid demand and intense design activity. Long-term trends such as 5G growth, the rapid rise of hyperscale computing and advancements in autonomous driving are driving increased design work throughout the semiconductor industry. In June 2025, it announced a major expansion of its partnership with Samsung Foundry through a new multi-year IP agreement. This collaboration aims to expand Cadence's portfolio of memory and interface IP solutions across Samsung's advanced process technologies, including SF4X, SF5A and SF2P nodes. By combining CDNS' AI-driven design platforms with Samsung's cutting-edge fabrication technologies, the two companies are set to deliver high-performance, low-power solutions tailored for AI data centers, automotive applications such as ADAS and next-generation RF connectivity. However, the company is up against strong competition from other EDA firms such as Synopsys, ANSYS and Siemens AG (after it acquired Mentor Graphics). This rising competitive intensity puts downward pressure on pricing, squeezing margins. To maintain its edge, Cadence has ramped up its R&D investments, especially in verification and digital design tools, which, while necessary, may hinder operating margin growth. CDNS currently has a Zacks Rank #2 (Buy). Shares of the company have soared 21.3% in the past three months compared with the Zacks Computer-Software industry's growth of 29.8%. Image Source: Zacks Investment Research Some other top-ranked stocks from the broader technology space are NETGEAR, Inc. (NTGR), TaskUs, Inc. (TASK) and Cognizant Technology Solutions Corporation (CTSH). NTGR currently sports a Zacks Rank #1 (Strong Buy), and TASK and CTSH carry a Zacks Rank #2. You can see the complete list of today's Zacks #1 Rank stocks here NETGEAR's earnings beat the Zacks Consensus Estimate in each of the trailing four quarters, with the average surprise being 179.12%. In the last reported quarter, NTGR delivered an earnings surprise of 105.71%. Its shares have gained 92.6% in the past year. TaskUs' earnings beat the Zacks Consensus Estimate in two of the trailing four quarters, matched in one and missed in the other, with the average surprise being 6.39%. In the last reported quarter, TASK delivered an earnings surprise of 18.75%. Its shares have risen 7% in the past year. Cognizant's earnings beat the Zacks Consensus Estimate in the trailing four quarters, the average surprise being 6.38%. In the last reported quarter, CTSH delivered an earnings surprise of 3.36%. Its shares have grown 4% in the past year. Want the latest recommendations from Zacks Investment Research? Today, you can download 7 Best Stocks for the Next 30 Days. Click to get this free report Cognizant Technology Solutions Corporation (CTSH) : Free Stock Analysis Report NETGEAR, Inc. (NTGR) : Free Stock Analysis Report Cadence Design Systems, Inc. (CDNS) : Free Stock Analysis Report TaskUs, Inc. (TASK) : Free Stock Analysis Report This article originally published on Zacks Investment Research ( Zacks Investment Research Error in retrieving data Sign in to access your portfolio Error in retrieving data Error in retrieving data Error in retrieving data Error in retrieving data
Business Wire
09-07-2025
- Business
- Business Wire
Cadence Introduces Industry-First LPDDR6/5X 14.4Gbps Memory IP to Power Next-Generation AI Infrastructure
SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence (Nasdaq: CDNS) today announced the tapeout of the industry's first LPDDR6/5X memory IP system solution optimized to operate at 14.4Gbps, up to 50% faster than the previous generation of LPDDR DRAM. The new Cadence ® LPDDR6/5X memory IP system solution is a key enabler for scaling up the AI infrastructure to accommodate the memory bandwidth and capacity demands of next-generation AI LLMs, agentic AI and other compute-heavy workloads for various verticals. Multiple engagements are currently underway with leading AI, high-performance computing (HPC) and data center customers. The evolution of data centers from HPC compute virtualization to AI training and inference at scale has driven a massive buildout of AI infrastructure, and designing for efficient data movement via memory interfaces has never been more crucial. Share The Cadence IP for the JEDEC LPDDR6/5X standard consists of an advanced PHY architecture and a high-performance controller designed to maximize power, performance and area (PPA) while supporting both LPDDR6 and LPDDR5X DRAM protocols for optimal flexibility. The solution supports native integration into traditional monolithic SoCs as well as multi-die system architectures by leveraging the Cadence chiplet framework, enabling heterogeneous chiplet integration. The chiplet framework, including the previous LPDDR generation, was successfully taped out in 2024. 'The evolution of data centers from HPC compute virtualization to AI training and inference at scale has driven a massive buildout of AI infrastructure, and designing for efficient data movement via memory interfaces has never been more crucial. LPDDR6 has emerged as a key enabler of accelerated compute, providing the speed, bandwidth, power profile and capacity needed to efficiently perform AI inference,' said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. 'With this tapeout, Cadence is continuing our track record of memory IP leadership by offering an industry-first LPDDR6 implementation delivered as an integrated subsystem optimized for customer applications.' The complete PHY and controller memory system boasts a new high-performance, scalable and adaptable architecture based on Cadence's proven and highly successful DDR5 12.8Gbps, LPDDR5X 10.7Gbps and GDDR7-36G product lines. This first offering in Cadence's new LPDDR6 IP product line supports the LPDDR6 and LPDDR5X standards, including LPDDR5X CAMM2. Suitable for the AI, mobile, consumer, enterprise HPC and cloud data center markets, the advanced LPDDR6/5X memory IP system solution allows maximum flexibility for end products with a range of performance, capacity and cost targets—ensuring long production runs. The LPDDR6/5X PHY is customizable for different package and system topologies and available as a drop-in hardened macro. This ensures fast and reliable integration, translating into rapid time to market. The Cadence LPDDR6/5X controller includes a full set of industry-standard and advanced features for memory interfaces, such as support for the Arm ® AMBA ® AXI bus. The memory controller is provided as a soft RTL macro for maximum flexibility in features, power, area and performance. The Cadence LPDDR6 solution includes the LPDDR6 Memory Model, which enables engineers to perform comprehensive verification and ensure that system-on-chip (SoC) designs are compatible with the latest JEDEC interface standard, accelerating their adoption of this new technology with confidence. The LPDDR6 Memory Model includes a complete set of protocol checks, functional coverage and a verification plan. Available now for customer engagements, the new LPDDR6/5X IP is the latest addition to Cadence's comprehensive family of memory IP system solutions, which also includes DDR, GDDR and HBM. Cadence Memory IP is designed with the company's industry-leading analog/mixed-signal design tools. When combined with Cadence's UCIe ™ -based chiplet framework, the new LPDDR6/5X IP and Cadence's other leading memory and interface IP deliver an optimized solution that enables rapid chiplet realization. For more information on the new LPDDR6/5X IP, please visit the LPDDR landing page on About Cadence Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence's Intelligent System Design ™ strategy, are essential for the world's leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world's top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at © 2025 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at are trademarks or registered trademarks of Cadence Design Systems, Inc. Arm and AMBA are registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. UCIe is a trademark of UCIe Consortium. All other trademarks are the property of their respective owners. Category: Featured
Phone Arena
09-06-2025
- Business
- Phone Arena
Samsung feels the pressure to develop and build its next-gen RAM chip earlier than planned
A fresh report says that Samsung now has the incentive to go all out and develop the next generation of RAM chips which would use the LPDDR6 RAM standard. What gives Samsung the incentive to accelerate the development of its next-gen RAM is the news that China's Innovative Memory Technology (CXMT) has completed developing its LPDDR5X RAM. As a result, CXMT is reducing the lead that Samsung has on them when it comes to RAM chips. Samsung already has a potential customer for its LPDDR6 RAM chips as Qualcomm reportedly will support the new RAM chip with its upcoming top-of-the-line Snapdragon 8 Elite 2 application processor (AP). This is the SoC that will be powering the Samsung Galaxy S26 Ultra in all regions early next year. It will be manufactured by TSMC using its third-generation 3nm node (N3P). Of course, Samsung is expecting to sell the LPDDR6 RAM chips to many more clients. Samsung used the 12nm LPDDR5X RAM chip on the Galaxy S25 Ultra. | Image credit-Samsung CXMT may have put pressure on Samsung to move ahead to the next-gen RAM at a greater speed than it might have otherwise. Keep in mind that based on reports from late last year and early this year, CXMT only has 5% of the global RAM market. South Korea's SK Hynix is the leader having topped Samsung with approximately 36% of the global RAM market. Samsung is next with a market share in a range between 33.7% - 34.4%. That leaves Micron Technology and its 24.3%-25% slice of the global RAM pie. The LPDDR5X RAM chip built by Samsung and used on the Samsung Galaxy S25 Ultra for both 12GB and 16GB variants was manufactured on Samsung Foundry's 12nm process node. Earlier versions of Samsung's LPDDR5X RAM chip, like the one used on the Galaxy S23 Ultra, were built by Samsung foundry using its 14nm process node.
Yahoo
27-01-2025
- Business
- Yahoo
Keysight Introduces Comprehensive LPDDR6 Solution for End-to-End Memory Design and Test Workflows
Delivers complete design and validation solution for Low-Power Double Data Rate 6 (LPDDR6) memory in mobile, client computing, and AI applications. Supports JEDEC's ongoing development of the new LPDDR6 memory standard. Enables enhanced performance analysis focusing on speed optimization, power efficiency, and reliability testing. Features advanced measurement-based noise compensation technology for superior signal integrity. SANTA ROSA, Calif., January 27, 2025--(BUSINESS WIRE)--Keysight Technologies, Inc. (NYSE: KEYS) announced the Low-Power Double Data Rate 6 (LPDDR6) design and test solution, a complete design and test solution to support the next technology wave for memory systems. The solution significantly improves device and system validation, providing new test automation tools necessary for advancing AI, especially in mobile and edge devices. The memory market is evolving due to the rising demand for high-performance computing, AI, and energy-efficient mobile applications. LPDDR6 significantly enhances performance and efficiency to support next-generation compute system requirements, making it a crucial upgrade for contemporary devices. Test complexity has grown with the adoption of next-generation memory devices such as LPDDR6, HBM4, and GDDR7. These technologies demand advanced test methods to ensure reliability and performance, and reducing test times while maintaining accuracy is a constant challenge. Keysight's complete workflow solution consists of transmitter and receiver test applications and the Advanced Design System (ADS) Memory Designer workflow solution. The LPDDR6 test solution can be paired with Keysight EDA software and the Keysight Memory Designer bundle to achieve faster design confidence from simulation to verification and test. The LPDDR6 test automation solution is based on Keysight's UXR oscilloscope and high-performance M8040A Bit Error Ratio Tester. LPDDR6's impact is expected to reach beyond mobile devices. The new memory standard's combination of high performance and power efficiency makes it particularly suitable for AI and machine learning applications, high-speed digital computing, automotive systems, data centers, and other edge applications areas where the balance between processing power and energy consumption is crucial. Key Benefits of Keysight's LPDDR6 Test Solution: Accelerate Time-to-Market with Advanced Transmitter Testing Reduce validation time with fully automated compliance testing and characterization Capture precise measurements quickly using industry-leading low-noise technology Debug design issues faster with streamlined data analysis tools Analyze device BER performance with extrapolated eye mask margin testing Achieve accurate signal measurements directly from BGA packages with specialized de-embedding capabilities Optimize Device Performance with Comprehensive Receiver Testing Validate designs confidently using proven Bit Error Ratio testing methodology Pinpoint performance issues early by testing against multiple jitter, crosstalk, and noise scenarios Maximize signal integrity through detailed BER analysis and receiver equalization optimization Ensure high interoperability with both device and host controller validation Deliver Next-Generation Memory Solutions Enable faster user experiences with higher data rates support Extend battery life and reduce power consumption in mobile and data center applications Build more reliable products with enhanced data integrity and system stability features Dr. Joachim Peerlings, Vice President and General Manager, Network and Datacenter Solutions, Keysight, said: "As a leader in memory design and test solutions, Keysight continues to collaborate with JEDEC to develop the LPDDR6 standard. This new LPDDR6 standard is set to revolutionize the market, offering unprecedented speed, efficiency, and reliability, enabling the industry's AI Edge rollout. As the deployment and use of next-generation memory devices are growing, Keysight has achieved a significant milestone in enabling faster time to market for LPDDR6 memory designs." The new receiver and transmitter solution will be shown to the public for the first time at DesignCon 2025, Jan 29-30, at booth number 1039 in Santa Clara, California. Resources Keysight's memory solutions Keysight D9060LDDC LPDDR6 Tx Compliance Test Software Keysight M80896RCA LPDDR6 Receiver Conformance and Characterization Test Application Keysight Memory Designer W3626B About Keysight Technologies At Keysight (NYSE: KEYS), we inspire and empower innovators to bring world-changing technologies to life. As an S&P 500 company, we're delivering market-leading design, emulation, and test solutions to help engineers develop and deploy faster, with less risk, throughout the entire product lifecycle. We're a global innovation partner enabling customers in communications, industrial automation, aerospace and defense, automotive, semiconductor, and general electronics markets to accelerate innovation to connect and secure the world. Learn more at Keysight Newsroom and View source version on Contacts Keysight Media Contacts North America PR Teampdl-americas-keysight-pr@ Fusako DohiAsia+81 42 660-2162fusako_dohi@ Jenny GallacherEurope+44 (0) 7800 737
