Latest news with #PowerVia
Yahoo
08-05-2025
- Business
- Yahoo
Customers Are Lining Up for 2nm TSMC N2 Chips
A battle for customers is brewing between Intel and TSMC as the silicon giants prepare for mass production of their next-gen chips. TSMC has the advantage of already being further ahead in developing its N2, 2nm-class node. It started taking orders in April, with Apple likely being its first major customer. But Intel recently hit the risk reduction milestone in its own journey to produce the sub-2nm 18A node, meaning customers have two very solid, high-density processes to choose from for the next couple of years. For its part, TSMC appears to be facing even greater demand for N2 than the company saw for its beloved N3 process, according to the China Times, which comes via Wccftech. According to the China Times, the high demand was confirmed by TSMC Chairman Wi Zhejia, who described it as 'unprecedented.' You'd expect a company to toot its own horn, but in this case, it appears very likely that both chip giants are seeing massive demand. TSMC didn't provide details of the N2 node's defect density rate but said that it's lower than comparable current devices. As Wccftech notes, the defect density rate is likely on par with those of TSMC's older 3nm and 5nm processes. That's a strong selling point for TSMC's process, which is expected to sell its wafers for about $30,000 each. TSMC research and development. Credit: TSMC TSMC has multiple fabs earmarked for its N2 process, though not all are going online at the same time. The first fab to produce the node is Fab 20, near Baoshan, Taiwan, which should be ramping up heavily by the last quarter of this year. Kaohsiung is next, with production expected in early 2026. TSMC also appears to have plans for N2 production in Arizona at Fab 21, but that will come later. Prices will likely be higher for the wafers produced in the US, considering that TSMC charges more for its current US 4nm node, but with US tariffs possible, TSMC's Arizona facility could end up helping US customers. Intel, meanwhile, has a new CEO, a refreshed brand, and a sub-2nm-class node. Broadcom and Nvidia are among those believed to have an interest in chips from the new process. Foundries rarely share specific information about customers, but it seems likely that many big names will take a look at Intel's new node, even as TSMC gobbles up customer orders. For one thing, customers who don't make it to the front of the line for TSMC may eyeball Intel as it ramps up. For another, Intel's 18A includes PowerVia, its backside power delivery network (BPDN). Both TSMC and Intel's latest-gen CPUs have gate-all-around (GAA) transistors for better performance and efficiency, but TSMC didn't put its upcoming BPDN on its N2. That gives Intel an accomplishment to point to, at least until the next generation nodes ramp up.
Forbes
29-04-2025
- Business
- Forbes
Intel Foundry And Synopsys Collaborate To Fast-Track 18A Chip Development
Intel CEO Lip-Bu Tan On Stage At Intel Foundry Direct Connect With Synopsys President And CEO ... More Sassine Ghazi In a joint announcement reflecting the growing importance of ecosystem collaboration in semiconductor design, Synopsys and Intel Foundry have expanded their partnership in support of chip development on Intel's 18A and 18A-P process technologies. This engagement aims to streamline and scale next-generation chip design for applications in AI, HPC, data center, client PC and mobile platforms. As Intel continues to evolve its foundry strategy under the leadership of its new CEO Lip-Bu Tan, collaborations with EDA and core IP providers like Synopsys are key to enabling a competitive and accessible design infrastructure for customers targeting Intel's new advanced process nodes. At the center of the announcement is Intel's 18A chip process, which introduces RibbonFET (Intel's gate-all-around transistor design) and PowerVia (backside power delivery), among other cutting-edge semiconductor design technologies. These innovations are key enablers that improve both performance and power efficiency of chips built on Intel processes at scale. Intel's 18A-P variant builds on this by offering additional optimization for performance-critical applications, and with better transistor density as well. Synopsys Electronic Design Automation Tools And IP Solutions To Accelerate Chip Design On Intel 18A To help design teams adopt these nodes effectively, Synopsys has certified its digital and analog EDA flows for Intel 18A, and those flows are now production-ready for 18A-P. Synopsys also provides a broad library of silicon-proven IP, including chip and system interfaces and foundation IP essential for building advanced system-on-chip designs. The availability of validated tools and IP is critical for customers seeking to reduce development timelines and manage risk when targeting these advanced chip fab nodes. In addition to process design support, the partnership also includes an optimized EDA reference flow for Intel's EMIB-T (Embedded Multi-die Interconnect Bridge Technology), a 2.5D advanced chip packaging solution that facilitates high-bandwidth integration across multiple dies within a single package. The reference flow supports a unified exploration-to-signoff platform, allowing design teams to manage 2.5D and 3D multi-die architectures more efficiently. This is particularly relevant as chip and system-level integration increasingly supplements traditional semiconductor node scaling (Moore's Law) in driving performance and functionality. Intel EMIB-T 2.5D Packaging Technology For Multi-Die System On Chip Designs EMIB-T and related advanced chip packaging technologies are an Intel strong suit for next-generation designs, particularly in data center AI applications, where compute density with better memory proximity helps drive performance. A certified EDA flow can reduce the complexity associated with these packaging technologies and support greater adoption across the industry. Looking ahead, Synopsys and Intel Foundry are also working together on early design enablement for Intel's 14A-E node, which is currently in development. While technical details are still scarce, 14A-E is expected to extend the architectural and manufacturing improvements introduced with 18A with 15 to 20% better performance-per-watt characteristics. By engaging early in the development of tools, flows and IP for 14A-E, the two companies aim to ensure that design infrastructure is in place when the process becomes commercially available, currently slated for late 2026 into early 2027. This approach reflects a broader trend toward concurrent design tool process co-optimization as process chip manufacturing nodes become more complex. This collaboration is aligned with Intel Foundry's broader strategy to build a complete ecosystem of tools, IP, and packaging capabilities that lower the barrier for entry for fabless semiconductor companies, like NVIDIA, Qualcomm, AMD, Broadcom, hot chip and tech start-ups, and many others. Having production-ready flows and validated IP in place is essential for serving both internal product groups at Intel and external customers. For Synopsys, the partnership reinforces its leadership in EDA enablement at advanced nodes and its commitment to supporting emerging packaging and system-level design methodologies. As complexity rises across the design stack, the need for integrated, validated solutions will continue to grow. From a market perspective, the announcement reflects how ecosystem partnerships are becoming foundational to delivering innovation at the angstrom scale. By working in parallel across process development, packaging and design flows, Intel and Synopsys customers can mitigate risk and shorten development cycles. The expanded collaboration between Synopsys and Intel Foundry provides a structured path for design teams targeting Intel's advanced process technologies, including 18A, 18A-P, and the future 14A-E node. With certified EDA flows, a broad IP portfolio, and advanced packaging support for EMIB-T, the partnership addresses key challenges in modern chip development. It will be interesting to track how the two companies progress as new external customers adopt Intel's 18A and advanced process nodes for state-side manufacturing here in the US.
Yahoo
25-02-2025
- Business
- Yahoo
Don't count Intel out as a long-term AI play
Intel (INTC) is in focus amid ongoing recovery efforts. Investors have toyed with the idea of a possible acquisition or split of businesses to revive the legacy chipmaker, which has struggled to keep up as names like Nvidia (NVDA) and Advanced Micro Devices (AMD) have capitalized on the artificial intelligence (AI) boom. Creative Strategies CEO and principal analyst Ben Bajarin joins Morning Brief co-hosts Seana Smith and Brad Smith to discuss Intel's position as an AI player and the challenges and concerns the company faces. "There's two things going on that we should be really focused on," Bajarin says regarding Intel. "One: What are their technology differentiators from a foundry standpoint? ... We know that Intel Foundry has a lot of very good core [intellectual property] IP that they've been developing, and that should be worth something." Secondly, Bajarin also suggests focusing on what Intel is "doing with underlying manufacturing technology — things like PowerVia, innovations in backside power, what they're doing in transistors in design." He adds, "We need to think about that the same way that we think about what TSMC (TSM) brings to the table that differentiates their customers to go and compete and design products." The analyst adds, "The [computer processing unit] CPU is still highly relevant to AI infrastructure; it's one of the most critical parts to reduce latency [and] to manage the orchestration layer. " He adds that he thinks investors can "get really caught up" in more advanced chips and "forget" that "there's actually a really nice upswing for design CPUs that are built from the ground up for AI, and we don't have those yet." While Bajarin believes Intel has "a lot of opportunity", he worries that investors may lose patience as "it's a long story." To watch more expert insights and analysis on the latest market action, check out more Morning Brief here. This post was written by Naomi Buchanan. Sign in to access your portfolio
Yahoo
21-02-2025
- Business
- Yahoo
With Trump Tariffs Looming, Intel Recruits Clients for US-Made 18A Process
PCMag editors select and review products independently. If you buy through affiliate links, we may earn commissions, which help support our testing. Intel's "18A" chip-manufacturing process, which promises to turn around the company's business, is ready to start accepting customer orders. The company published a new website hailing the arrival of 18A, which is scheduled to start 'tape outs' in the first half of the year, meaning the chip process has entered the final design process. Intel then expects to kick off volume production in the second half of 2025, including for its 'Panther Lake' laptop chip and the 'Clearwater Forest' server processors. 18A is especially important because it's designed to be competitive with the leading-edge chip-manufacturing process from Taiwan's TSMC, which counts Apple, AMD, and Nvidia as clients. "I've bet the whole company on 18A," former Intel CEO Pat Gelsinger said last year before abruptly retiring. Intel's website also points out that 18A represents 'the earliest available sub-2nm advanced node manufactured in North America, offering a resilient supply alternative for customers.' This comes as President Trump plans on tariffing foreign-made chips, including those from TSMC, in an effort to push tech companies to migrate their electronics manufacturing to the US. Trump has warned his tariffs will start at '25% and higher' for foreign-made chips. That's a problem for TSMC and its clients since most of the company's manufacturing happens in Taiwan, although its first fab in Arizona recently started chip production. On the flip side, the tariffs could be a boon for Intel, which began making a new push into the foundry business starting in 2021. The company has since struck deals to build chips for Arm, Amazon AWS, and Microsoft using the 18A process, which has been developed at Intel facilities in Arizona and Oregon. The big question is whether the 18A chips will meet the hype. So far, Intel has only said the manufacturing process features an 'up to 15% better performance per watt and 30% better chip density' versus the company's older Intel 3 process node. The resulting chips will also contain a 'PowerVia' and 'RibbonFET' architecture to cut down on interconnect bottlenecks while improving the power efficiency.
Yahoo
14-02-2025
- Business
- Yahoo
A Closer Look At Intel's 18A and TSMC's N2 Processes
Thanks to technological differences, Intel's 1.8nm-class 18A process and TSMC's 2nm-class N2 process are somewhat difficult to compare. But a new paper by TechInsights offers some interesting details about TSMC's N2 process that highlight noteworthy differences between the two nodes. In performance, the paper suggests that Intel's 18A node will likely take the top spot, but remember that this is a prediction. TechInsights expects TSMC's N2 production to be underway well before the end of the year. One area where Intel is ahead of TSMC is with its backside power delivery network. TSMC also has plans for a BPDN, but that's for upcoming technology, as opposed to its N2 nodes. (That would be the 1.6nm process, which will have the Super Power Rail. We should be seeing more about that node next year.) Intel, on the other hand, will have PowerVia, its proprietary BPDN tech, in its 18A node. 'Another interesting thing we are hearing about backside power delivery is that foundry HPC customers want it but mobile customers don't due to cost,' TechInsights notes. When it comes to wafer prices, things get a little bit murky. TechInsights points out that, if the rumors are true and TSMC's 18A wafers really go for $30,000 per wafer, the price increase would far outstrip the increase in wafer density. But TechInsight, which has a good track record, thinks the wafers will come in below that price. TechInsight also looked at high density logic cell transistor density. Although it can't disclose some of the information it uses in its calculations, TechInsight puts TSMC in first place for density, with Intel in second place and Samsung in third place. Chipmakers understandably keep many details about their technology under wraps, but TSMC seems to be offering less information in its recent technical papers, at least for IEDM. That's according to TechInsights, which noted that SRAM cell size was missing from this technical paper and that graphs lacked units, potentially making them less useful. TechInsights even goes so far as to call TSMC's latest IEDM papers 'marketing papers.' But TechInsights acknowledges that the details TSMC provides are compelling. 'Although the paper doesn't present the kind of technical details that would typically be included in an IEDM paper, it does paint a picture of a process ready for 2025 production and the session was packed,' it writes.
