RISC-V can open up locked CPU market: Ananant Systems

Time of India

a day ago

NEW DELHI: The
RISC-V
Instruction Set Architecture (ISA) has the potential to open the tightly locked central processing unit (CPU) architecture, enabling startups and companies to develop chips for various customised applications, said a senior executive of
Ananant Systems
.
Currently, SoftBank-backed chipmaker
Arm Holdings
licenses its RISC (Reduced Instruction Set Computer) technology to chipmakers like MediaTek and Qualcomm, who then develop processors for smartphones and tablets, while Intel and AMD's x86 CISC (Complex Instruction Set Computer) architecture powers general-purpose laptops and personal computers.
Open-source RISC
promises to lower the cost of developing affordable chipsets for specialised applications, such as artificial intelligence (AI) inferencing and wireless signal processors, Chitranjan Singh, founder & CEO, Ananant Systems, told ETTelecom in an interview.
'For the last few decades, the
CPU architecture
has been closed, and there has been no open-source architecture suitable for some of the huge use cases. So, RISC-V is very fit for standalone microcontrollers and embedded applications,' he said.
The Bengaluru-headquartered startup, with in-house intellectual property (IP),
chip design
, semiconductor products, software, and systems, said its
digital signal processor
(DSP) chip uses RISC-V.
CISC processors come with a large instruction set with complex instructions that can perform multiple operations in a single cycle, compared to RISC, which has a smaller instruction set with simpler, more easily executed instructions, making the technology suitable for applications where high-performance, simplicity and efficiency are the main criteria.
'...with RISC-V, we can efficiently add a co-processor with specialised instruction sets for particular use cases of wireless signal processing and AI inference,' Singh said. 'Given the adaptability of the architecture, our product will be suitable for other applications like small cell and private 5G.'
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But despite the potential of RISC-V, its uptake has been slow. The executive attributed this to a lack of software ecosystem, adding that it may take 10-20 years to build a sizeable software segment that can run on this architecture.
The startup is developing a 5G fixed wireless access (FWA) chip, which it says offers more efficiency and cost-savings over the incumbents. It is in discussions with state-controlled
Bharat Sanchar Nigam Limited
's (
BSNL
) vendors to this extent.
The Ministry of Electronics and IT (MeitY) in 2022 had launched the Digital India RISC-V, or the DIR-V programme, to enable India to realise self-reliance in semiconductors and microprocessors.
Rajeev Chandrasekhar, the then minister of state for electronics and IT, had said that RISC-V has emerged as a strong alternative to Arm and Intel x86 in the last 10 years, having no licensing encumbrances, enabling its adoption by "one and all in the semiconductor industry, at different complexity levels for various design purposes".
Notably, IIT Madras and the Centre for Development of Advanced Computing (C-DAC) have already developed the SHAKTI Processor and the VEGA Processor, respectively, based on RISC-V.